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Ake Malhammer | September 2005

Chip Level Dynamics


calculator: transient temperature distribution in a block

introduction

heat loads are rarely static. the fluctuations are in many cases too small to be considered but there are, nevertheless, cases where they are significant. they can appear on any level in a system, from the enclosure down to the nano-scaled grid level. a couple of decades ago this was not much of a problem. the heat dissipation was modest, so assuming a worst case and over-sizing the cooling system was en easy way out. things are different nowadays. disregarding dynamics is not a good design practice anymore.

one matter that makes transient thermal analyses so complex is that the time constants vary considerably, from minutes on the pcb level to milliseconds on the switching grid level. bringing them all together in a gigantic model and calculate is, therefore, practically impossibile. as with almost all thermal problems, the first approach must be to identify the issues that need to be looked at more closely.

this article is about temperature variations on the nano scale level. it has always been an issue for power components. today, when the heat density for various logical circuits approaches 100 w/cm2, (average chip surface value), it is fast becoming a problem that not can be overlooked. the purpose here is to provide an overview, not to present accurate calculations methods.


figure 1- does a series of heat pulses result in sequence of large temperature peaks or rather ripples around the average value?

figure 1 shows the problem. does a series of heat pulses result in sequence of large temperature peaks or rather ripples around an average value? the temperature response must obviously depend on the frequency. when low, it tends to form peaks, when high, it tends to form ripples. the frequency is nevertheless not the only parameter involved. there at least two other important ones, the size of the heat source and the material properties. thermal theory can give an insight into how they interact.

figure 2- fundamental heat transfer equation transformed into a dimensionless version.

theory

the basic equation for thermal conduction is the fourier equation, figure 2. the left side represents the time dependence and the right side the space dependence. as shown, a simple variable substitution involving a characteristic length, a characteristic time and a characteristic temperature difference can make the equation completely dimensionless. the fourier number, (fo), that appears is very important for the following discussion. it is a part of the problem formulation, so it must always appear in any solution regardless of the boundary conditions.

from a purely theoretical point of view the “characteristic” parameters can be chosen freely. the length could for example be the distance to the moon. from a practical point of view, the choice must be more purposeful, (meaning that the parameter selected should have a major impact on the result). the characteristic temperature difference is the easiest one to deal with. it can for the majority of cases simple be set to 1 k. the characteristic time is also fairly obvious. for periodic functions it should be the period time and for step variations it should be the time constant. the characteristic length is a bit more intricate.

figure 3- comparison of a large and a small heat source.

figure 3 shows two examples of static temperature profiles in a block with a discrete heat source on one side and isothermal conditions on the opposite side. when the heat source is large it is evident that there is an impact of all block measures. when the heat source is small, the major part of the temperature losses is concentrated to its vicinity. for this case, a quick glance at figure 3 makes it evident that the best choice for characteristic length is the heat source side.

figure 4- definition of the amplitude factor

source temperature

for studies on the nano scale level, it is convenient to use a chip with isothermal conditions on the bottom side and a small quadratic source dissipating heat as a sin-function on the top side, figure 4. negative heat dissipation does not exist on the chip level but since heat conduction is linear it is possible to separate the static and the dynamic part. only the latter is considered here, so the resulting temperature difference can be negative. for very low frequencies, (high fo-numbers), the temperature response can be looked at as a sequence of static cases. the amplitude factor for this case is defined as 1.0. for higher frequencies, (lower fo-numbers), the amplitude factor decreases and there is also a phase shift. given the definition of the fo-number, it is also obvious that small heat sources tend to create large amplitudes and vice versa.

figure 5- amplitude factor as function of the fourier number.

figure 5 shows a more elaborated result. the straight part of the line represents values that are totally independent of the block measures. the curved upper part represents values with an impact of the thickness, which in this case was 0.3 mm silicon chip. the corresponding values for a line source follow the same but the amplitude factor is roughly 15% lower.

 

year

[year]

line width [nm]

frequency

[mhz]

fo

[--]

log10(fo)

[--]

amp fact

[%]

1980

1500

5

5.29

0.72

81

1990

1000

20

2.98

0.47

76

2000

180

1000

1.84

0.26

70

2005

90

3000

2.45

0.39

74

 

 

table 1- approximate historic development for pc processors.

 

another perspective on the problem is the historic development. table 1 shows it for pc processors. the amplitude factor has not changed much over the last 25 years. the impact of downscaling has apparently been counter-balanced by the frequency increase, (some profound physics is probably the reason). the order of the amplitude factor is nevertheless interesting. given that these calculations are based on a simplified case, a reasonable guess is that the actual factor is somewhere in the range 50% - 100%, clearly indicating that thermal transients not can be neglected.

the temperature losses on the chip level have so far been small compared with the total temperature difference, so very accurate calculations have not been needed. the time when better methods are needed is however quickly approaching. a 10x10 mm chip dissipating 100 w would create a temperature difference of ~3 k if the load was uniform and static. when compensating for the dynamic load, using an amplitude factor of 50%, there is another 1.5 k. the heat load is however never uniform, so the actual temperature difference is probably a factor ~2 - 10 higher, which again indicates that dynamic effects not can be disregarded for high heat density applications.

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Heat Transfer Calculators