chip level dynamics, part 2

by: ake malhammer

calculator: transient temperature distribution in a block
back ground article : chip level dynamics, part 1

 
introduction

detailed chip level thermal design has been practiced for many years. typical applications are circuits with a few but powerful heat sources. for logical components it has, so far, been sufficient to look at clusters of sources rather than individual ones. the time when this approach needs to be refined is, however, fast approaching. this is a great challenge, not because the physics is unknown but because it is very complex. detailed transient 3-d analyses involving millions of heat sources are just not feasible. could it be done with simpler means? are there good approximations? this article takes a look at these issues.

the fundamental arrangement used here is a silicon chip with mainly quadratic heat sources on one side and isothermal conditions on the other. it is apparently an approximation but the idea is to present a basic overview. the heat dissipation is further separated into a static and a dynamic part. the latter takes positive values during one half-cycle and negative values during the other, making the average value zero. the referenced article presents the theoretical background and outlines the temperature response for sin-shaped power dissipation. this article uses the same approach to expose interactions between adjacent sources.

figure 1- the temperature amplitude is reduced with the distance from the heat source.

penetration depth

figure 1 shows two temperature profiles in a block with a cyclic heat source on one side and isothermal conditions on the other. the tendency is apparent. the further away from the heat source, the smaller is amplitude and the larger is the phase shift. given the mathematical expression, which in this case is an analytical solution, it is possible to quantify the phenomenon. for that purpose it is convenient to define the amplitude-ratio. it takes the value 1.0 at the centre of the heat source and less than unity elsewhere. if, furthermore, the heat source is considered small, the block, viewed from that source, would appear as a semi-infinite solid. so, there is little impact of the block measures. travelling down an imaginary line from the centre of the heat source, an observer would sense successively smaller amplitude-ratios. each amplitude-ratio therefore also corresponds to a distance, here called the penetration-depth.

figure 2- penetration depth for a small heat source

figure 2 shows an approximation for the effect. it is associated with a large error and should be understood as indicatory. the parameters are the amplitude-ratio, the fo-number, (see the reference article for a theoretical background) and the characteristic length of the heat source. it is apparent that the penetration depth varies considerably with the conditions. table 1, which monitors a historic development for processors, can provide some understanding of the orders involved. it shows the penetration-depth/source side-ratio as function of three amplitude-ratios, 0.1, 0.01 and 0.001.

table 1- the penetration-depth as function of the amplitude-ratio for pc processors.

the side-wise penetration, defined for a line on the surface, equals that for the depth-wise penetration if pd/d>1.5. since the minimum space between two sources is a line width, the centre-to-centre distance is pd/d=2. as table 1 reveals that the amplitude-ratio for that distance is in the range 1% - 10%. so, even if the values are highly approximate they do indicate that the interaction between two adjacent heat sources is small. there is also an impact from more distant sources but because of the spread in phase shifts, they will by and large cancel each other. the conclusion is that the impact of the dynamic part of the heat dissipation is very local indeed. this is an important conclusion because it means that dynamic temperature calculations can be confined to small volumes, which considerably facilitates simulations.

figure 3- temperature response for a step change in heat dissipation.

step response

the recent progress in micro circuit technology has made the structures so small that it has become possible to double certain functions. in the wake of that development it has been suggested that the temperature could be limited by doubling critical structures and letting the execution alternate between two locations without changing the logic. each location would in that case sense a step in heat dissipation and the idea is to make the switch when the temperature has reached a predefined critical level.

figure 3 shows the temperature response for a small heat source when the heat dissipation suddenly is switched on. the curve is not exactly exponential but it is similar. it is therefore convenient to define the time constant as the time at which the temperature difference has reached 63%, (1-exp(-1)), of its final value. an interesting measure in this context is how many clock cycles there are within the time constant. assuming small quadratic heat sources and using the time constant as parameter in the fo-number, it turns out that it is a constant ~0.15. for rectangles, side ratio<4, this is also a reasonable approximation.

table2- number of clock cycles within the time constant for a quadratic heat source..

table 2 shows the result for the same processors as above. the time constants are for all cases smaller than the clock cycles. it is therefore not possible do even one single operation within the frame of the time constant. the same conclusion can be made from the fact that the amplitude factors are ~75%, (see the reference article). in short, solely looking at the chip level the idea does not work, (for the cases in table 2). going beyond the isothermal bottom assumption and considering that chips always are bounded to a material with finite thermal conductivity, will certainly reveal some gains. most probably moderate. the design diversity on that level is however so large that each case must be dealt with individually.

although the result of this exercise is negative, the positive aspect is that the chip level step response, at least as a first approach, can be disregarded when looking into the matter more profoundly.

 
figure 4- impact of switching the left heat source on and off. 

static interaction

an alternative to duplicating functions is to space the heat sources. figure 4 shows temperature profiles caused by the static load when the left source is switched on and off and the sources are separated be a heat source side. for large sources there is no significant impact but for small sources there is a ~20 % temperature difference increase, (approximately independent on the source size and the chip thickness). doubling the separation distance approximately results in ~10% interaction. the phenomenon can be detected by the 45 degree rule. this rule is only precise for d>h but if the distance at which the 45 degree lines intersect is of the order of the source width, one can be sure that there is an interaction.

looking at one single interaction is however not sufficient for understanding this case. if the source is surrounded by 6 other sources of equal strength doubling the separation distance would result in a temperature difference decrease on the 20% - 30% level. the impact from more distant sources is also much more important than for the dynamic case. each single source does not contribute much but they are on the other hand numerous. this matter can be somewhat clarified by looking at a regular array of small quadratic heat sources separated by a heat source side width. applying the 45 degree rule for this case reveals that a uniform heat dissipation approximation is good enough. suppose that the separation was doubled, it would make the array a factor 1.5 larger on the linear scale and a factor 2.25 on the surface scale. the temperature difference would approximately drop 50%. it is an important gain. combined with the values for the local impact above, it forks the potential gains on the range 20% -50%. .

conclusions

the temperature impact of the dynamic part of the heat dissipation is so local that it has little impact on adjacent heat sources.

the time constant for processor designs is smaller than the clock cycle. it therefore seems difficult to limit the temperature by letting the execution jump between different locations on a chip.

for the static part of the heat dissipation, it seems as if separation of heat sources could be a mean to significantly reduce the temperature.