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John O | August 2018

Cold electron transistor design receives patent, could boost computer cooling

By Josh Perry, Editor


Researchers at the University of Texas – Arlington (UTA) have received a patent for a novel cold electron transistor, which drastically reduces the amount of energy required to operate it compared to traditional transistors.


Seong Jin Koh, a Department of Materials Science and Engineering professor, received a patent on technology he developed that reduces the power dissipation on transistors. (UTA)


According to a report from the university, the cold electron transistor could reduce the power dissipation by a factor of 100 in devices such as cell phones, laptops, tablets, and even in data centers. Researchers believe that the technology has developed since its first reporting in 2014 and is now scalable for market.


This technology could enable cell phone users to only charge their device “once every couple of weeks,” according to the report.


In the initial research, the scientists demonstrated a method for cooling electrons using quantum wells to -228°C. The research was published in Nature Communications. The abstract stated:


“Fermi-Dirac electron thermal excitation is an intrinsic phenomenon that limits functionality of various electron systems. Efforts to manipulate electron thermal excitation have been successful when the entire system is cooled to cryogenic temperatures, typically <1 K.


“Here we show that electron thermal excitation can be effectively suppressed at room temperature, and energy-suppressed electrons, whose energy distribution corresponds to an effective electron temperature of ~45 K, can be transported throughout device components without external cooling. This is accomplished using a discrete level of a quantum well, which filters out thermally excited electrons and permits only energy-suppressed electrons to participate in electron transport.


“The quantum well (~2 nm of Cr2O3) is formed between source (Cr) and tunnelling barrier (SiO2) in a double-barrier-tunnelling-junction structure having a quantum dot as the central island.


“Cold electron transport is detected from extremely narrow differential conductance peaks in electron tunnelling through CdSe quantum dots, with full widths at half maximum of only ~15 mV at room temperature.”

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