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John O | January 2019

Scientists demonstrate first 3-D, atomic-scale, silicon quantum chip architecture


By Josh Perry, Editor
jperry@coolingzone.com

 

Researchers from the University of New South Wales (UNSW) Center of Excellence for Quantum Computation and Communication Technology (CQC2T) in Sydney, Australia are the first to demonstrate a process for building atomic qubits in a 3-D device, which is a step towards building a universal quantum computer.

 


Study authors Dr Joris Keizer and Professor Michelle Simmons.
(University of New South Wales)

 

According to a report from the university, researchers adapted their qubit fabrication technique, which was published in 2015, to build multiple layers on a silicon crystal. “The group is the first to demonstrate the feasibility of an architecture that uses atomic-scale qubits aligned to control lines – which are essentially very narrow wires – inside a 3D design,” the article added.

 

The qubits were also aligned the different layers with nanometer precision and read qubit states in a single measurement with high fidelity. No other research has demonstrated that level of control of qubits in parallel.

 

Although the researchers admit that a quantum computer is still “at least a decade away,” this breakthrough is another step towards that realization.

 

The research was recently published in Nature Nanotechnology. The abstract read:

 

“The realization of the surface code for topological error correction is an essential step towards a universal quantum computer. For single-atom qubits in silicon, the need to control and read out qubits synchronously and in parallel requires the formation of a two-dimensional array of qubits with control electrodes patterned above and below this qubit layer.

 

“This vertical three-dimensional device architecture requires the ability to pattern dopants in multiple, vertically separated planes of the silicon crystal with nanometer precision interlayer alignment. Additionally, the dopants must not diffuse or segregate during the silicon encapsulation.

 

“Critical components of this architecture—such as nanowires, single-atom transistors and single-electron transistors - have been realized on one atomic plane by patterning phosphorus dopants in silicon using scanning tunneling microscope hydrogen resist lithography.

 

“Here, we extend this to three dimensions and demonstrate single-shot spin read-out with 97.9% measurement fidelity of a phosphorus dopant qubit within a vertically gated single-electron transistor with <5 nm interlayer alignment accuracy. Our strategy ensures the formation of a fully crystalline transistor using just two atomic species: phosphorus and silicon.”

 

Learn more in the video below:

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