By Josh Perry, Editor
[email protected]

Researchers at Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU) in Germany demonstrated an accurate method for finding defects in the newest silicon carbide (SiC) transistors that they believe will speed up the development of energy-efficient, next-generation transistors.

Physicist Martin Hauck fits a silicon carbide transistor into the measuring apparatus: researchers at FAU have discovered a method for finding defects at the interfaces of switches. (FAU/Michael Krieger, Martin Hauck)

According to a report from FAU, “Boosting the efficiency of power electronic devices is one way to save energy in our highly technological world…At the same time, however, these components should ideally use as little electricity as possible. If not, heat is generated unnecessarily, additional complex cooling systems are needed and energy is wasted as a result.”

Silicon has been the foundation of electronic components for years but it has material limitations that SiC and other semiconductors have surpassed, such as its ability to withstand high voltages, high temperatures, and high switching frequencies. The issue for SiC MOSFETs is that defects can grow on the interface between the material and the layer of silicon oxide that grows on the surface.

“Conventional measurement techniques, which have usually been developed with silicon MOSFET devices in mind, simply ignore the existence of such defects,” the report said. FAU researchers saw patterns in the defects to make a more accessible and easily reproducible testing method.

A mathematical formula was created that gives not only gives precise device parameters but also to “determine the distribution and density of interface defects almost on the side.”

The test formula was tried out by industry partners Infineon Technologies Austria AG and its subsidiary Kompetenzzentrum für Automobil and Industrie-Elektronik GmbH and was proven to be accurate.

“Taking a close look at the inner core of the field-effect transistors allows now for improved and shorter innovation cycles,” the report said. “Using this method, processes aimed at reducing defects can be evaluated accurately, quickly and simply, and work at developing new, more energy-saving power electronics can be accelerated accordingly.”

The research was recently published in Communications Physics. The abstract read:

“Silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) are key devices for next-generation power electronics. However, accurate determination of device parameters from 3-terminal characteristics is hampered by the presence of interface traps. Here we present a method that, in contrast to previous evaluation schemes, explicitly considers those defects.

“A well-tractable parametrization of the SiC/SiO2-specific interface trap spectrum is introduced that reflects the body of known data. With this ingredient, we develop an analysis that targets for an accurate determination of device parameters from simple 3-terminal characteristics.

“For its validation, we investigate MOSFETs with significantly different defect densities. The resulting parameters – charge carrier density, mobility and threshold voltage – are in excellent agreement with Hall effect investigations on the very same devices, avoiding systematic errors inherent to conventional evaluation techniques.

“With this adapted scheme, 4H-SiC power MOSFETs, even packaged, can be meaningfully characterized, speeding up innovation cycles in energy-saving power electronics.”