By Josh Perry, Editor
A team of researchers led by engineers from the New York University (NYU) Tandon School of Engineering (Brooklyn, N.Y.) demonstrated that thermal scanning probe lithography (t-SPL), which requires a probe heated above 100°C, was better than standard methods for building metal electrodes on 2-D semiconductors, including molybdenum disulfide (MoS2).
Researchers in the PicoForce Lab modified hot-probe equipment called NanoFrazor by SwissLitho to invent a new process of fabricating 2D semiconductors.
(NYU Tandon School of Engineering)
This process is better than standard electron beam lithography (EBL), according to a report from NYU, because it improves the quality of 2-D transistors to overcome the Schottky barrier, allows the semiconductor to be imaged and the electrode pattern to be determined, and reduces the cost by operating in ambient conditions and removing the need for an ultra-high vacuum.
Researchers believe the process can be scaled up for production by using parallel thermal probes. “The precedent of 3-D printers is an apt analogy,” the article explained. “Someday these t-SPL tools with sub-10 nanometer resolution, running on standard 120-volt power in ambient conditions, could become similarly ubiquitous in research labs.”
The research was recently published in Nature Electronics. The abstract said:
“Two-dimensional semiconductors, such as molybdenum disulfide (MoS2), exhibit a variety of properties that could be useful in the development of novel electronic devices. However, nanopatterning metal electrodes on such atomic layers, which is typically achieved using electron beam lithography, is currently problematic, leading to non-ohmic contacts and high Schottky barriers.
“Here, we show that thermal scanning probe lithography can be used to pattern metal electrodes with high reproducibility, sub-10-nm resolution, and high throughput (105 μm2 h−1 per single probe). The approach, which offers simultaneous in situ imaging and patterning, does not require a vacuum, high energy, or charged beams, in contrast to electron beam lithography.
“Using this technique, we pattern metal electrodes in direct contact with monolayer MoS2 for top-gate and back-gate field-effect transistors. These devices exhibit vanishing Schottky barrier heights (around 0 meV), on/off ratios of 1010, no hysteresis, and subthreshold swings as low as 64 mV per decade without using negative capacitors or hetero-stacks.”