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John O | April 2019

TSMC announces first complete design infrastructure for 5 nm process technology


By Josh Perry, Editor
jperry@coolingzone.com

 

Taiwan Semiconductor Manufacturing Company Ltd. (TSMC) recently announced that it has created the first complete version of its five-nanometer (nm) design infrastructure that enables 5 nm systems-on-chip (SoC) for next-gen mobile and high-performance computing applications.

 


TSMC announced its new 5 nm chip process technology, which could be included in next-gen iPhones. (Wikimedia Commons)

 

According to TSMC, the design process is in risk production. “Compared with TSMC’s 7nm process, its innovative scaling features deliver 1.8X logic density and 15% speed gain on an ARM® Cortex®-A72 core, along with superior SRAM and analog area reduction enabled by the process architecture,” the company said.

 

The 5 nm process was simplified by using EUV (extreme ultraviolet) lithography. TSMC created full versions of the 5 nm Design Rule Manual, SPICE model, process design kits and silicon-validated foundation and interface IP. Using the Open Innovation Platform® (OIP), TSMC partners are already using the design for product tape-outs, pilots, and sampling.

 

“TSMC’s 5-nanometer technology offers our customers the industry’s most advanced logic process to address the exponentially growing demand for computing power driven by AI and 5G,” said Cliff Hou, Vice President of Research & Development/Technology Development at TSMC. “5-nanometer technology requires deeper design-technology co-optimization. Therefore, we collaborate seamlessly with our ecosystem partners to ensure we deliver silicon-validated IP blocks and EDA tools ready for customer use.”

 

Dr. Aniruth Devgan, President of Cadence (a partner of TSMC), said, “Building upon several years of close collaborations with TSMC, we’ve advanced 5nm SoC design innovation across next-generation mobile, HPC and infrastructure application areas like AI and 5G, and have enhanced our tools with machine learning capabilities to improve power, performance and area outcomes. To further support the production delivery of TSMC’s 5nm design infrastructure, Cadence has undergone TSMC’s latest 5nm v1.0 certification process and delivered IP and integrated tools, flows and methodologies that support both traditional and cloud-based environments.”

 

According to MacRumors.com, TSMC has been Apple’s “exclusive supplier of A-series chips since 2016,” including the A10 Fusion chips for the iPhone 7, A11 Bionic chip for the iPhone 8, and the A12 Bionic chip for the iPhone XS.

 

“TSMC's packaging offerings are widely considered to be superior to that of other chipmakers, including Samsung and Intel, so it's not surprising that its exclusivity is poised to continue with A13 chips in 2019 and A14 chips in 2020,” the MacRumors.com article explained.

 

In addition to the news about its chip manufacturer, Apple has also designed a novel concept for adaptive surface that will open vents when overheating, according to an article from PatentlyApple.com.

 

The patent notes that the surface may be formed from a shape-memory material that will change to a second configuration “until the temperature of the adaptive surface falls below a threshold, and then returns to the first configuration in a bi-stable manner.”

 

It was originally filed in the third quarter of 2018 and was only approved this month. Read more at https://www.patentlyapple.com/patently-apple/2019/04/apple-invents-cool-adaptive-metal-surfaces-that-allow-device-housings-to-shape-shift-and-open-micro-heat-vents.html.

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