alexandra francois-saint-cyr, an application engineer for flomerics, made a presentation at the designcon 2006 conference to encourage electrical engineers to be more proactive about thermal management. the presentation pointed out that power dissipation of electronic devices has been rising steadily to the point that thermal management must be considered as an integral part of the design process for most products. further, francois-saint-cyr noted that pcb component layout, which using current design methods is often decided long before cooling issues are addressed, has a major effect on junction temperature and failure rate. the presentation showed how electrical engineers can use simulation to identify potential thermal problems during the board design process. once identified, these problems can often be solved at this early stage of the process with inexpensive layout changes.

francois-saint-cyr pointed out the lack of involvement of electrical engineers in thermal issues means that thermal issues are normally not addressed until the later stages of the design process when component placement has been fixed and the board routed. the problem with this approach is that potential thermal issues that arise at this point are usually expensive to resolve, because substantial changes such as a cabinet redesign or board placement changes and rerouting are required. in a cost sensitive product, the need for custom or exotic thermal solutions may even wind up killing the design after considerable time and money have been expended.

francois-saint-cyr provided background information on mechanical engineering topics such as heat transfer and fluid flow which play a critical role in thermal management. she explained the concept of thermal conductivity and thermal resistance and showed how they can be calculated for typical pcbs. she explained convective and radiative heat transfer and laminar and turbulent fluid flow and showed their impact on thermal management of electronic devices. she showed how heat sinks and interface materials can be used to address hot spots. the presentation demonstrated the effect of pcb component layout on junction temperature and failure rate by comparing two layouts and showing that the probability of failure was eight times greater in one than the other.

francois-saint-cyr showed how time to market and product failures can be reduced by performing board level thermal simulation very early in the design process. this analysis can help highlight potential thermal issues and provide engineers with more flexibility in resolving them before hundreds of hours of engineering time is invested in unusable designs. problems identified at this stage can often be addressed by layout changes that can be made nearly without cost at this early stage of the process. board level simulation tools are usually much easier for electrical engineers to use because they are designed around the same tools that they already use, such as functional block diagrams and physical layouts.

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