by bruce m. guenin
associate editor, amkor technology

(this is the third article of a four-part series. click the following links to read the other three installments:  part 1, part 2, part 4.)

in recent issues, this column has dealt with the use of a number of thermal metrics to calculate the junction temperature of integrated circuits under various conditions.  these metrics explored were _ja, _jc, and _jt. to summarize the uses of these metrics:

• _ja represents the junction-to-air thermal resistance for a package tested in an industry-standard test environment.  it is useful in determining changes in thermal performance due to design changes and for ranking package thermal performance. _ja is of limited value in predicting the junction temperature in an application.

• _jc , the junction-to-case thermal resistance, is useful in predicting the junction temperature when a package has a heat-sink mounted on top of it.

• _jt , the junction-to-top of package thermal characterization parameter, is used to determine the junction temperature of a chip in an existing system from a measurement of the temperature on the top of the package.

none of these metrics is useful in predicting the junction temperature in a semiconductor package without a heat sink in an actual system.  when there is no heat sink, the primary heat flow path for a surface-mounted package is typically though the pcb.  hence, this situation requires a thermal metric relating the junction and the board temperatures.

the recently specified _jb thermal resistance metric [1,2] is measured under conditions in which nearly all of the heat is flowing to the board.  it is useful in the analysis of actual systems when it is used as a component in a thermal resistor network defining the other heat flow paths.

the thermal characterization parameter _jb [1,3] is measured under conditions more typical of actual applications -- namely with most of the heat flowing through the board, but a non-negligible portion of it flowing from the top of the package to the air.  hence, it is a stand-alone parameter that can be quite useful in predicting the junction temperature from a measurement of the board temperature.

_jb is defined as:

_{jb =} t_j - t_b / p

where the board temperature, t_b , is measured just beyond the package edge, along its centerline, preferably by soldering a type t thermocouple to the appropriate trace on the board.  p represents the total power dissipated on the device.

the value of  _jb for a particular package depends upon many factors in the package design. these factors will not be explored here. however, some insight into to behavior of _jb for a popular package format can be derived from examining the graph top right.  this graph demonstrates the relationship between   _jb and _ja , a much more widely known parameter, for a family of 35 mm pbga packages of varying thermal performance.

the graph indicates that, for this particular group of packages _ja,  varies from 12 to 25°c/w.   _jb has a linear relationship with respect to _ja  and varies between 5 and 19°c/w.  this behavior is consistent with the fact that the dominant heat flow path is from the junction to the board to the air.  since   _jb characterizes the thermal efficiency of this path, a reduction in  _jb is manifested as an equivalent reduction in  _ja.

figure 1. _jb versus _ja for a family of 35 mm pbga packages of varying construciton.  packages mounted to jedec-standard test board.  natural convection conditions.

in this table, the maximum allowable power for a given combination of t_j,max and t_b is located at the intersection between the column and row associated with the values of interest.  the difference between t_j,max and t_b can be defined as the thermal budget for the package.  the allowable power depends linearly on the thermal budget available to the package.  here it ranges from a minimum of 0w to a maximum of 6.0w -- for an unusually large thermal budget.

this table makes it very clear that the maximum power possible in a package depends on three factors: t_j,max , which is specified by the semiconductor producer; t_b, which is controlled by the system house; and _jb, which is determined by the chip and package design.

it is rare for the semiconductor producer or the package provider to know t_b .  however, such a table can be the start of a three-way dialog in which the impact of the board temperature on the maximum allowable power is defined. this, in turn, can help facilitate informed decisions regarding cost/performance tradeoffs between packaging choices and system design.

references

1.  bennet joiner, "use of junction-to-board thermal resistance in predictive engineering," electronics cooling magazine, vol.5, no. 1, (january, 1999), pp. 14-17.
2.  jedec standard, "integrated circuits thermal test method environmental conditions - junction-to_board," eia/jesd51-8.  [available for downloading at www.jedec.org at no charge.]
3.  jedec standard, "integrated circuits thermal test method environmental conditions - forced convection (moving air)," eia/jesd51-6.