abstract

in the european project seed (supplier evaluation and exploitation of  delphi), the methods for thermal characterization of active components  developed in the predecessor delphi (development of libraries of physical  models for an integrated design environment) were evaluated by component  suppliers. the methods were improved for practical application and  extended to a large number of ic package types.

test parts were chosen to cover a wide range of different plastic  packages, including alloy42 (feni42) and cu-based lead frame material, as  well as different chip sizes in the same package. standard and thermal  enhanced devices, dso, qfp and bga packages were studied. for all device  types investigated, it was possible to generate simple resistor networks,  which reproduce junction temperatures and fluxes of a detailed model for  all 38 boundary conditions suggested in delphi with an average accuracy of  1-2%.

seed succeeded in proposing practical methods for thermal  characterization of active components, which are robust and relatively  cheap (no test pcb is needed). the resulting thermal resistor network  allows end users for the first time to routinely predict the junction  temperatures of components in their specific applications with high  accuracy.

introduction

power consumption of semiconductor integrated circuits increases with  integration and clock frequencies. thermal management is a critical  requirement and cfd (computational fluid dynamics) software has become a  common tool for thermal analysis. it allows calculation of local air  temperatures and heat transfer coefficients. if correct and simple thermal  models of critical components are available, it becomes possible to  calculate their junction temperatures with sufficient accuracy to serve as  input for reliability analysis.

unfortunately, accurate and simple thermal models do not exist. usually,  one of the two thermal resistance values θ_ja,  junction to ambient or θ_jc,  junction to case is used to characterize the thermal behavior of the  component in an application. initially, these values were meant for  comparison of ic packages in a standardized environment. junction  temperatures, heat fluxes and the so-called thermal resistances are  strongly dependent on the cooling conditions. consequently, the  standardized thermal resistances are of limited value for end users,  because the environment differs considerably from those in real  applications.

however, the component supplier cannot supply thermal data for all  combinations of packages and environments. the only way to overcome this  problem is to make a clear distinction between package and environment. a  first step is to split θ_ja into two resistances. one is the package part  θ_jb from junction to board, the other is the contribution of the board to  ambient, θ_ba. this approach is restricted to one heat flow path via leads  and pcb. even if this is the main heat path, there is a considerable  dependence on the pcb design. despite these shortcomings, θ_jb could be used as a metric for comparison purposes [1].

the problem of the thermal-electrical analogy is discussed in more detail in [2]. purely unidirectional heat flow is difficult to achieve,  because the heat flux from a source is in many cases dissipated in all  three spatial directions involving conduction, convection and radiation as  transport mechanisms. single thermal resistance values only characterize  one possible heat flow path. for a complete thermal characterization of a  package more than one measurement is necessary to characterize all  possible heat flow directions which a package may encounter in practice.

the delphi project

the objective of the delphi project was to provide equipment  manufacturers with simple, validated thermal models, which can be used  with confidence in a wide range of environments [3,4,5].

an early statement was that a meaningful thermal simulation requires a  strict separation between the responsibilities. system level packaging  engineers are responsible for the component environment. component  manufacturers should supply a thermal model of a package for all practical  environments. this condition is met by an experimentally validated  detailed model. however, such a model is not desirable for both the  component manufacturer, who may not want to disclose his inner package  construction, and the system designer, who cannot handle the enormous  amount of data of a system level simulation comprising several detailed  models.

the solution sought was a simple but still universal thermal model: a  so-called compact model, consisting of a small thermal resistor network,  which could be made independent of all possible practical boundary  conditions (bc), proved to be the answer. such a compact model has been  coined a bc-independent (bci) compact model. in practice a set of 38 bc at  package surfaces and leads was established to cover all practical  environments and a scientific extreme. an extended set is discussed in  [6].

within delphi, several novel measurement techniques and numerical data  reduction methods were developed. basically, the delphi method consists of  four steps:

1. a package is measured in four different experiments using a dual cold  plate (dcp) to provide well defined, conductive bc in order to extract  heat along the main paths in the package. heat sinking occurs in :

- dcp-1 at top and bottom surface.

- dcp-2 at bottom surface, top insulated by low conductive spacer.

- dcp-3 at top surface, bottom insulated by low conductive spacer.

- dcp-4 at leads.

2. a detailed model of the component is created and validated against  the four dcp measurements.

3. using the validated detailed model, junction temperatures and thermal  fluxes are calculated for the 38 bc.

4. the user gives the shape of a compact model. the values of the  resistors are adjusted by a numerical optimization routine.

as examples, the dcp-1 and the dcp-4 set-up are shown in figures 1 and  2.

after delphi was ended, the goal of the follow-up project seed  (involving the three major european semiconductor manufacturers) was to  evaluate the method in practice.

the seed project

a new method means additional cost in terms of measurement equipment,  consumables, sample preparation, and manpower.  to be acceptable, a new  technique must work in practice, serve customers, and should be easy,  robust and low cost.

parts were selected to cover an as wide as possible range of plastic  packages currently in use, including comparison of alloy42 and cu-based  lead frame material, as well as a large and a small chip inside the same  package, standard and thermal enhanced power devices, dso, qfp and bga  packages. all samples feature a siemens thermal test die (g423a) inside  [7].

after equipment installation, treating practical issues, and creating  the software for pc controlled experiments and data processing, the bulk  of measurements was performed. the measures that have been taken to  improve the four dcp-measurements are discussed in more detail in ref [7].  the most important was to replace the individually designed test pcb by  simple cu-sheets, which allowed heat sinking in dcp-4. cu-sheets for bga  packages have a solder stop mask on top with circular openings for  controlled solderball collapse.

the purpose of the four dcp measurements is to validate a detailed model  of the test sample. finite element modeling using ansys software was  employed to generate these models. the thermal conductivity of the plastic  material used for insulating spacers and pedestals was separately  measured. experimental and modeling results are compared in table 1,  choosing the experimental data as the reference. no experimentally  adjusted parameters are used in the fe models. the absolute agreement of  modeling and measurement results is considered to be excellent, although a  high relative error of 30% is observed for the very small resistance of  sbga-352 in dcp-1. some deviations in dcp-3 and dcp-4 are probably  caused by manufacturing tolerances.

some results

fe simulations using the validated models were performed for all 38  boundary condition sets suggested in delphi. each set is a combination of  four heat transfer coefficients at the top, bottom, side and solder areas  (leads, balls) of a package. resulting junction temperatures, fluxes and  the areas of 'top inner' (ti), 'top outer' (to), 'bottom  inner' (bi), 'bottom outer' (bo), 'sides' (s) and  'leads' (l) are transferred to a modeling result table, which  finally is passed to a optimization routine. at siemens an optimizer based  on excel spreadsheets was programmed. more sophisticated software exists  [5]. the connectivity is chosen by the user, based on physical intuition  or an iterative procedure. as an example, figure 3 shows a graphical  representation of the final resistor network of an sbga-352.

the optimizer minimizes a cost function by varying the initially  arbitrary values of the input table. as an example of an output, the  maximum junction temperature error of the bci resistor network predictions  compared to detailed model results are plotted in figure 4.

table i. comparison between detailed model and dcp-experiments

m:  measurement     s:  simulation     d:  deviation

conclusion

in seed, the delphi methods for thermal characterization of active  electronic components by thermal resistor networks were further improved.  as a result, thermal measurement techniques for electronic components are  available which are:

• universal,
• robust,
• low cost (no test pcbs needed)
• physically much better than existing methods, especially for detailed  model validation.

both experimental and numerical tools were successfully applied to a  wide selection of plastic packages, including power and bga types. for all  device types investigated, it was possible to generate a resistor network,  which reproduces junction temperature and fluxes of a detailed model for  all boundary conditions suggested in delphi with an average accuracy of  0.5-2%. maximum errors are usually much lower than 10%.

in conclusion, practical methods are available which enable:

• component suppliers to fully characterize the thermal behavior of  their products by means of a simple resistor network and a meaningful  small data set supplied with the component.
• end users to routinely calculate junction temperatures of active  components in their specific applications with high accuracy.

 
figure 4.  sbga-352:  relative error of bci junction temperatures compared to the
detailed modeling results.

work in progress

standardization of experimental and numerical methodologies under jedec  jc15 is in progress and should have an impact on adoption by a majority of  manufacturers. it is expected that experienced system designers will soon  request resistor networks for critical components.

the resistor network concept can be used stand alone to calculate  junction temperatures, if the bc in an application are known or can be  estimated. it can also be extended , e.g. to the pcb contribution below  and around the component provided the details are known. standardized  metrics like θ_ja, θ_jc or θ_jb could be treated this way. in fact, if the resistor network is universal,  covering all practical boundary conditions, it should of course also cover  those defined by current standards.

acknowledgements

the authors wish to acknowledge the ec and the siemens management for  sponsoring the project, as well as the very open and fruitful cooperation  with the other partners involved in seed.

gerhard noebauer
siemens ag semiconductor group
keble college
oxford
ox1 3pg
england
tel.: 0044/1865/280021/22519
e-mail: [email protected]
 

heinz pape
siemens ag semiconductor group
dept: hl be qip sim
p.o.box 80 17 09
d-81617 munich
tel: +49 (0)89-636-25157
fax: +49 (0)89-636-22250
e-mail: [email protected]

references

 
1. b. joiner, "use of junction-to-board thermal resistance in  predictive engineering", electronics cooling magazine, vol.5, no.1, 1999, pp. 14-18
2. c. lasance, "thermal resistance: an oxymoron?", electronics cooling magazine, vol. 3, no.2, 1997, pp.20-22
3. h. rosten , c. lasance, j. parry, "the world of thermal  characterization according to delphi-part i: background to delphi",  ieee trans chmt vol.20, 1997, pp. 384-391
4. c. lasance, h. rosten , j. parry, "the world of thermal  characterization according to delphi-part ii: experimental and numerical  methods", ieee trans chmt vol.20, 1997, pp. 392-398
5. c. lasance, h. vinke, h. rosten, "thermal characterization of  electronic devices with boundary condition independent compact models",  ieee trans chmt vol.18, 1995, pp. 723-731
6. c. lasance, d. den hertog, p.stehouwer, "creation and evaluation  of compact models for thermal characterization using dedicated optimization software" proceedings semitherm xv, san diego, ca, march  1999, pp. 189-200
7. h. pape and g. noebauer, "generation and verification of  boundary independent compact thermal models according to the delphi/seed  methods" proceedings semitherm xv , san diego, ca, march 1999, pp.  201-211