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December 2005
library  >  Application Notes  >  Sarang Shidore

Thermal Analysis of IC Packages - An Introduction


anyone of you who has designed a piece of electronic equipment knows that thermal overload is one of the most important reasons for system failure. in fact, some studies have shown that every 10 c increase in the operating temperature causes a near-doubling of the failure rate of a semiconductor device.

 

1260px-three_ic_circuit_chips_600

(wikimedia commons)


whether an electronic system under design is a computer, a telecom base station, or something else, chances are that semiconductor chips form the bulk of its components. these chips are also often the hottest parts in the system. the operating temperature of the semiconductor die - i.e. junction temperature - is the critical parameter that must be maintained within the design constraints of the device.

 

(although the term "junction temperature" seems to imply that the semiconductor die is isothermal, this is not always the case. in some cases, the power dissipation from the die is non-uniform enough so as to cause a significant non-uniformity in temperature - 15 c or sometimes, even more - on the die surface. however, for the purpose of this discussion, let us assume that the silicon surface can indeed be characterized by a single temperature.)

 

since most semiconductor die are packaged, the package body is usually the first barrier that the heat must cross before it eventually makes its way into the outside ambient. the temperature drop from the die to the board is often a significant fraction (could be 50% or more) of the total temperature drop from the die to the ambient. this means that a large part of the thermal resistance of the junction-to-ambient in many common environments is within the package itself. thus, understanding the role of the package is critical for determining the junction temperature.

 

the world of electronics thermal designers is divided into two - packaging engineers and system designers. packaging engineers, who usually work for semiconductor or assembly/test houses, are specialists who know a great deal about packaging. very generally speaking, system designers, who have to keep up with a highly diverse set of skills in mechanical and thermal design, do not have the bandwidth in their workday to master the intricate details of the rapidly evolving area of ic packaging.

 

at the same time, however, they need an accurate answer to their junction temperature problem. if anything, they need this answer even more urgently than the chip designers, because a thermally overloaded chip can cause failure in the systems that the system designer will ultimately be held responsible for.

 

this defines one of the central challenges in the package thermal world today. it is not that understanding package-level thermal analysis is rocket science, but its somewhat specialized nature has meant that for far too long, many system designers have been forced to use highly approximate approaches to estimate junction temperature of critical parts in their designs. in today's world of ever-tighter design constraints and ever-shorter time-to-market challenges, this is not a sustainable reality.

 

beginning with this column, i shall be writing regularly about the world of thermal analysis of ic packages. because the overwhelming number of engineers in the electronics industry needing a solution to their junction temperature problems are system designers, i shall be primarily targeting this group. my column will be heavily weighed towards simulation and analysis aspects, rather than testing, because simulation has always been my primary area of interest.

 

however, i will also dwell on industry standards and practices, and any other allied topics that i feel are worth writing about. please feel welcome to correspond with me anytime with any feedback, suggestions, and thoughts you might have.

 


 

 

about sarang shidore:

 

sarang shidore obtained engineering degrees from iit madras (india), texas a & m university (college station), and university of texas (austin). he worked at flomerics inc. in various roles in engineering and product management with a special focus on package-level thermal modeling and analysis, a field in which he has authored several papers and articles.

 

in addition, he worked for mentor graphics as product marketing manager and for several years as a consultant for various organizations. he is currently a visiting scholar at the lbj school of public affairs at the university of texas focused on energy and climate policy and future strategies. 

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