By Josh Perry, Editor
jperry@coolingzone.com

Engineers at Columbia University (New York, N.Y.) revealed a new fabrication method for building transistors from two-dimensional material stacks that is clean and damage-free and shows improved performance over previous 2-D semiconductors fabricated using conventional methods.

An enhanced optical microscope image of a Hall-bar structure used to characterize transistor properties for devices made with ultraclean transferred contacts. (Columbia Engineering)

According to a report from the university, the two-step, ultra-clean process separates the conventional steps, which include metallization, chemicals, and polymers that form the electrical connections to the device, from the active semiconductor layer.

“Once they complete the messy fabrication, they could pick up the contacts and transfer them onto the clean active device layer, preserving the integrity of both layers,” the article added.

By protecting the thin semiconductor layer from contamination, the researchers demonstrated improved performance in the final product and less degradation over time than with conventional methods.

“The team made the transferred contacts from metal embedded in insulating hexagonal boron nitride (h-BN) outside a glovebox and then dry-transferred the contact layer onto the 2D semiconductor, which was kept pristine inside a nitrogen glovebox,” the article explained. “This process prevents direct-metallization-induced damage while simultaneously providing encapsulation to protect the device.”

The research was recently published in Nature Electronics. The abstract stated:

“Two-dimensional semiconductors have a number of valuable properties that could be used to create novel electronic devices. However, creating 2D devices with good contacts and stable performance has proved challenging.

“Here we show that transferred via contacts, made from metal embedded in insulating hexagonal boron nitride and dry transferred onto 2D semiconductors, can be used to create high-quality 2D transistors. The approach prevents damage induced by direct metallization and allows full glovebox processing, providing a clean, stable and damage-free platform for 2D device fabrication.

“Using the approach, we create field-effect transistors (FETs) from bilayer p-type tungsten diselenide (WSe₂) that exhibit high hole mobility and low contact resistance. The fabricated devices also exhibit high current and stability for over two months of measurements.

“Furthermore, the low contact resistance and clean channel allow us to create a nearly ideal top-gated p-FET with a subthreshold swing of 64 mV per decade at 290 K.”

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